Xgig Exerciser for CXL v1.1/v2.0

The VIAVI Solutions Xgig® Exerciser for CXL™ v1.1/v2.0 brings turn-key compliance test capability to the Xgig product portfolio. An Exerciser is also a valuable tool for debugging difficult protocol communication problems because it provides full, bit-level, repeatable control over the CXL data traffic.

The VIAVI Xgig Exerciser enables in-depth protocol evaluation and debugging at 32GT/s per lane, as well as testing for CXL compliance, allowing development of memory and accelerator products to meet the demands of emerging high-speed, high-performance computing applications. With a modular architecture and an implementation tightly coupled to a full-featured analysis system, the Xgig Protocol Exerciser reduces the need for extra hardware investments, while a familiar Xgig management interface helps limit training needs, minimizing overall design and development costs.

Please contact your local VIAVI representative for details or find more product options on our PCIe and CXL equipment pages.

Benefits

• Approved by the CXL Consortium for CXL Gold Suite workshop compliance testing
• Enables capture and decoding of the most complex CXL test cases
• Maximum flexibility in analyzing and debugging protocol issues
• Powerful graphical control interface provides quick status information and rapid test case set-up
• Optimizes signal integrity at 32GT/s
• Quicker time to market and earlier revenue
• Lower engineering costs

Applications

• Generates and responds to CXL compliant traffic
• Allows capture and analysis of traffic flows between the Exerciser and its link partner
• Capable of operating as a Root Complex (RC) or an Endpoint (EP) device
• Supports CXL v1.1 and v2.0
• Performs LTSSM testing: both positive and negative test scenarios via VIAVI LTSSM Override function
• LTSSM state tracker with history log
• Save and load custom test configurations
• Scripting API allows complex, user-created test cases
• User-configurable custom test configurations for positive and negative test cases
• Graphical control interface provides easy visual presentation and setup of test procedures

Highlights

• Supports all PCIe data rates from 2.5GT/s to 32GT/s
• Supports link widths of 1, 2, 4, 8 and 16-lanes
• User can set link rates and widths and control transitions to other rates
• Tightly aligned operation with the Analyzer for fully detailed bit-level trace captures
• Runs on the VIAVI 5P16, 5P8 and 6P4 platforms
• Works with the Xgig PCIe5 Exerciser Host-Mode Test Stand
• Supported by VIAVI Xgig tool suite including Trace Control, Expert and Serialytics